Efficiency optimization of charge pump circuit in NAND FLASH memory
نویسندگان
چکیده
منابع مشابه
Circuit Techniques for a 1.8-V-Only NAND Flash Memory
Focusing on internal high-voltage ( ) switching and generation for low-voltage NAND flash memories, this paper describes a switch, row decoder, and charge-pump circuit. The proposed nMOS switch is composed of only intrinsic high-voltage transistors without channel implantation, which realizes both reduction of the minimum operating voltage and elimination of the leakage current. The proposed ro...
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Copyright ©2015 KIEEME. All rights reserved. This is an open-access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/by-nc/3.0) which permits unrestricted noncommercial use, distribution, and reproduction in any medium, provided the original work is properly cited. pISSN: 1229-7607 eISSN: 2092-7592 DOI: http://dx...
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ژورنال
عنوان ژورنال: IEICE Electronics Express
سال: 2011
ISSN: 1349-2543
DOI: 10.1587/elex.8.1343